View SY10H841L_172320.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

3.3V SINGLE SUPPLY QUAD PECL-TO-TTL W/LATCHED OUTPUT ENABLE
FEATURES
s s s s s 3.3V power supply Translates positive ECL to TTL (PECL-to-TTL) 300ps pin-to-pin skew 500ps part-to-part skew Differential internal design for increased noise immunity and stable threshold inputs s VBB reference output s s s s Single supply Enable input Latch enable input Extra TTL and ECL power/ground pins to reduce cross-talk/noise s High drive capability: 24mA each output s Fully compatible with industry standard 10K, 100K I/O levels s Available in 16-pin SOIC package
ClockWorksTM PRELIMINARY SY10H841L SY100H841L
DESCRIPTION
The SY10/100H841L are single supply, low skew translating 1:4 clock drivers. The devices feature a 24mA TTL output stage, with AC performance specified into a 20pF load capacitance. A latch is provided on-chip. When LEN is LOW (or left open, in which case it is pulled low by the internal pulldowns) the latch is transparent. A HIGH on the enable pin (EN) forces all outputs LOW. As frequencies increase to 40MHz and above, precise timing and shaping of clock signals becomes extremely important. The H841 solves several clock distribution problems such as minimizing skew (300ps), maximizing clock fanout (24mA drive), and precise duty cycle control through a proprietary differential internal design. The 10K version is compatible with 10KH ECL logic levels. The 100K version is compatible with 100K levels.
PIN CONFIGURATION
BLOCK DIAGRAM
Q0
LEN EN GE VE D
1 2 3 4 5 6 7 8 SOIC Z16-1
16 15 14 13 12 11 10 9
Q3 GT Q2 VT VT Q1 GT Q0
Q1
D VBB GT
Q2 VBB
PIN NAMES
D D LEN EN DQ Q3
Pin GT VT VE GE D, D VBB Q0 - Q3 EN LEN 1 Function TTL Ground (0V) TTL VCC (+3.3V) ECL VCC (+3.3V) ECL Ground (0V) Signal Input (PECL) VBB Reference Output (PECL) Signal Outputs (TTL) Enable Input (PECL) Latch Enable Input
Rev.: C Amendment: /0
Issue Date: May, 1999
Micrel
ClockWorksTM PRELIMINARY SY10H841L SY100H841L
TRUTH TABLE
D L H X X LEN L L X H EN L L H L Q L H L Latch
PIN DESCRIPTION
Pin 1 2 3 4 5 Symbol LEN EN GE VE D D VBB GT Q0 GT Q1 VT VT Q2 GT Q3 Description Latch Enable Input Enable Input (PECL) ECL Ground (0V) ECL VCC (+3.3V) ECL Signal Input (Non-inverting) ECL Signal Input (Inverting) VBB Reference Output (PECL) TTL Ground (0V) Signal Output (TTL) TTL Ground (0V) Signal Output (TTL) TTL VCC (+3.3V) TTL VCC (+3.3V) Signal Output (TTL) TTL Ground (0V) Signal Output (TTL)
ABSOLUTE MAXIMUM RATINGS(1)
Symbol VE (ECL) VT (TTL) VI (ECL) VOUT (TTL) Tstore TA Rating Power Supply Voltage Input Voltage Storage Temperature Operating Temperature Value -0.5 to +7.0 -0.5 to +7.0 0.0 to VEE 0.0 to VT -65 to +150 0 to +85 Unit V V C C
6 7 8 9 10 11 12 13 14 15 16
NOTE: 1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATlNG conditions for extended periods may affect device reliability.
DC CHARACTERISTICS
VT = VE = +3.0V to +3.6V
TA = 0C Symbol IEE ICCH ICCL Parameter Power Supply Current Power Supply Current ECL TTL Min. -- -- -- Max. 40 20 25 TA = +25C Min. -- -- -- Max. 40 20 25 TA = +85C Min. -- -- -- Max. 40 20 25 Unit mA mA Condition VE Pin Total all VT pins
TTL DC ELECTRICAL CHARACTERISTICS
VT = VE = +3.0V to +3.6V
TA = 0C Symbol VOH VOL IOS Parameter Output HIGH Voltage Output LOW Voltage Output Short Circuit Current Min. 2.0 -- -80 Max. -- 0.5 -- TA = +25C Min. 2.0 -- -80 Max. -- 0.5 -- TA = +85C Min. 2.0 -- -80 Max. -- 0.5 -- Unit V V mA Condition IOH = -3.0mA IOL = 24mA VOUT = 0V
2
Micrel
ClockWorksTM PRELIMINARY SY10H841L SY100H841L
10H ECL DC ELECTRICAL CHARACTERISTICS(1)
VT = VE = +3.0V to +3.6V
TA = 0C Symbol IIH IIL VIH VIL VBB Parameter Input HIGH Current Input LOW Current Input HIGH Voltage Input LOW Voltage Output Reference Voltage Min. -- 0.5 2.130 1.350 1.920 Max. 225 -- 2.460 1.820 2.030 TA = +25C Min. -- 0.5 2.170 1.350 1.950 Max. 175 -- 2.490 1.820 2.050 TA = +85C Min. -- 0.5 2.240 1.350 1.990 Max. 175 -- 2.580 1.855 2.110 Unit A A V V V Condition -- -- VE = 3.3V VE = 3.3V VE = 3.3V
NOTE: 1. ECL VIH, VIL and VBB are referenced to VCCE and will vary 1:1 with the power supply. The levels shown are for IVT = IVO = VCCE = +3.3V.
100H ECL DC ELECTRICALCHARACTERISTICS(1)
VT = VE = +3.0V to +3.6V
TA = 0C Symbol IIH IIL VIH VIL VBB Parameter Input HIGH Current Input LOW Current Input HIGH Voltage Input LOW Voltage Output Reference Voltage Min. -- 0.5 2.135 1.490 1.920 Max. 225 -- 2.420 1.825 2.040 TA = +25C Min. -- 0.5 2.135 1.490 1.920 Max. 175 -- 2.420 1.825 2.040 TA = +85C Min. -- 0.5 2.135 1.490 1.920 Max. 175 -- 2.420 1.825 2.040 Unit A A V V V Condition -- -- VE = 3.3V VE = 3.3V VE = 3.3V
NOTE: 1. ECL VIH, VIL and VBB are referenced to VCCE and will vary 1:1 with the power supply. The levels shown are for IVT = IVO = VCCE = +3.3V.
AC CHARACTERISTICS
VT = VE = +3.0V to +3.6V
TA = 0C Symbol tPLH tPHL tskpp tskew++ tskew- - tPLH tPHL tPLH tPHL tr tf fMAX -- -- tS tH Parameter Propagation Delay D to Output Part-to-Part Skew(1,4) Within-Device Skew(2,4) Within-Device Skew(3,4) Propagation Delay LEN to Q Propagation Delay EN to Output Output Rise/Fall Time 1.0V to 2.0V Max. Input Frequency(5,6) Pulse Width Recovery Time EN Set-up Time D, EN Hold Time D, EN Q0-Q3 Q0-Q3 Q0-Q3 Q0-Q3 Q0-Q3 Q0-Q3 Q0-Q3 Q0-Q3 Q0-Q3 Q0-Q3 Q0-Q3 Q0-Q3 Min. 2.2 -- -- -- 2.2 2.2 -- 160 1.5 1.0 0.75 0.75 Max. 3.2 0.5 0.3 0.3 3.2 3.2 1.5 -- -- -- -- -- TA = +25C Min. 2.1 -- -- -- 2.1 2.1 -- 160 1.5 1.0 0.75 0.75 Max. 3.1 0.5 0.3 0.3 3.1 3.1 1.5 -- -- -- -- -- TA = +85C Min. 2.0 -- -- -- 2.0 2.0 -- 160 1.5 1.0 0.75 0.75 Max. 3.0 0.5 0.3 0.3 3.0 3.0 1.5 -- -- -- -- -- Unit ns ns ns ns ns ns ns MHz ns ns ns ns Condition CL = 20pF CL = 20pF CL = 20pF CL = 20pF CL = 20pF CL = 20pF CL = 20pF CL = 20pF -- -- -- --
NOTES: 1. Device-to-Device Skew considering HIGH-to-HIGH transitions at common VCC level. 2. Within-Device Skew considering HIGH-to-HIGH transitions at common VCC level.
3. Within-Device Skew considering LOW-to-LOW transitions at common VCC level. 4. All skew parameters are guaranteed but not tested. 5. Frequency at which output levels will meet a 0.8V to 2.0V minimum swing. 6. The fMAX value is specified as the minimum guaranteed maximum frequency. Actual operational maximum frequency may be greater.
3
Micrel
ClockWorksTM PRELIMINARY SY10H841L SY100H841L
TTL SWITCHING CIRCUIT
VEE USE 0.1F CAPACITORS FOR DECOUPLING. PECL 50 COAX PULSE GENERATOR IN DEVICE UNDER TEST TTL OUT 450 VCC & VCCO
50 COAX
50 COAX
USE OSCILLOSCOPE INTERNAL 50 LOAD FOR TERMINATION.
CH A OSCILLOSCOPE
CH B
ECL/TTL PROPAGATION DELAY -- SINGLE ENDED
50% VIN Tpd++ 1.5V VOUT Tpd- -
ECL/TTL WAVEFORMS: RISE AND FALL TIMES
2.0V VOUT Trise Tfall 0.8V
PRODUCT ORDERING CODE LOGIC DIAGRAM
Ordering Code SY10H841LZC SY10H841LZCTR SY100H841LZC SY100H841LZCTR Package Type Z16-1 Z16-1 Z16-1 Z16-1 Operating Range Commercial Commercial Commercial Commercial 4
Micrel
ClockWorksTM PRELIMINARY SY10H841L SY100H841L
16 LEAD SOIC .300" WIDE (Z16-1)
Rev. 03
MICREL-SYNERGY
TEL
3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA
FAX
+ 1 (408) 980-9191
+ 1 (408) 914-7878
WEB
http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. (c) 2000 Micrel Incorporated
5

▲Up To Search▲

Price & Availability of SY10H841L

	To Download SY10H841L Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .